AndesCore™ AX66
64-bit out-of-order 4 wide decode 13-stage CPU core with 128 reordering buffers and 8 functional pipelines
Symmetric multiprocessing up to 8 cores
Private L2 cache support
Level-3 shared cache and coherence support
AndeStar™ V5 Instruction Set Architecture (ISA)
Compliant to RISC-V GCBV and Vector Cryptography
Hypervisor(RVH)
RVA23 profile compliant
64-bit architecture for memory space over 4GB
TAGE Branch predication for highly accurate prediction
Linux-capable Memory Management Unit (MMU)
Physical Memory Protection (PMP) and latest architecture enhancement extension (ePMP) for access permission controls
AIA with APLIC and IMSIC support
ECC or Parity for SRAM error protection
StackSafe™ hardware to help measuring stack size, and detecting runtime overflow/underflow
PowerBrake and WFI (Wait for Interrupt) for different power saving occasions